Saturday, January 27, 2007

WASE BITS-WIPRO SESSION 3 DT:28-01-07

VENUE : WIPRO HYDERABAD
AUDIENCE : BITS-WASE 2006 BATCH
RESOURCES : PATTPATEL PPTs AND MORRIS MANO TEXT

Chapter 3Digital LogicStructures
Transistor: Building Block of Computers
Microprocessors contain millions of transistors
• Intel Pentium 4 (2000): 48 million
• IBM PowerPC 750FX (2002): 38 million
• IBM/Apple PowerPC G5 (2003): 58 million

Logically, each transistor acts as a switch
Combined to implement logic functions
• AND, OR, NOT
Combined to build higher-level structures
• Adder, multiplexer, decoder, register, …
Combined to build processor
• LC-3
Digital circuits
Constructed with ICs
IC is a small semiconductor crystal called chip containing gates
Depending on the number of gates we call them SSI,MSI,LSI,VLSI
SSI-10 GATES
MSI-200 GATES e.g. DECODERS,ADDERS,REGISTERS
LSI-1000s OF GATES e.g. PROCESSORS,MEMORY
VLSI- MANY 1000s MEMORY ARRAYS, COMPLEX CHIPS

DIGITAL INTEGRATED CIRCUITS
THE circuit technology/ digital logic family have their own basic electronic circuit upon which more complex digital circuits and functions are developed.
The basic circuit in each technology is either a NAND, a NOR or an inverter gate.
Logic Families
TTL/DTL- SUPPLY IS 5VOLTS, TWO STATES ARE 0,3.5V
ECL-SUPER COMPUTERS, DELAY IN NANOSECS
MOS- UNIPOLAR TRANSISTOR ONLY ONE CARRIER i.e. ELECTRONS(N-CHANNEL) OR HOLES(P-CHANNEL) CALLED AS PMOS AND NMOS
CMOS-PMOS+NMOS IN COMPLEMENTARY FASHION
Decoder
Combination circuit that converts binary information from n inputs to 2n unique outputs
N x m decoder means n inputs and m outputs where m<=2n
3 x 8 decoder can be used for binary to octal conversion

Commercial decoders have enable input E . If E=1 the decoder operates in normal fashion and if E=0 then the outputs are equal to zero

Decoder Expansion:- A 6-to-64 decoder can be constructed using four 4-to-16 decoders
Multiplexer

Combinational circuit that receives binary information from one of 2n input data lines and directs it to a single output line

The selection of a particular input data line for the output is determined by a set of selection inputs.

May have enable input E


Registers
A register consists of group of flip-flops and gates that effect their transition.
Flip-flops are capable of storing one bit of information.
Gates control when and how new information is transformed in to the register.
The transfer of new information into a register is referred to as loading the register.
Memory
A memory unit is a collection of storage cells together with associated circuits needed to transfer information in and out of storage. The memory stores binary information in groups of bits called words. A word in memory is an entity that moves in and out of storage as a unit.

Conventional memory – 1M = 220=20 address lines
= 640k + 384k uma. Addresses are from A0000 to FFFFF

Memories are RAM and ROM
RAM has two operations read and write, data input output lines, address lines, control lines
Memories
The internal structure of a memory unit is specified by the
number of words it contains and the number of bits in
each word. Special input lines called address lines select
one particular word. Each word has one unique address.

A decoder accepts this address and opens the path
needed to select the bits of the specified word.
Logic Gates
The manipulation of binary information is done by logic circuits called gates.

Gates are blocks of hardware that produce signals of binary 1 or 0 when input logic requirements are satisfied.

Each gate has a distinct graphic symbol and its operation can be described by an algebraic expression.

The input-output relationship of the binary variables for each gate can be represented in tabular form by a truth table.

Combinational Circuits
It is a connected arrangement of logic gates with a set of inputs and outputs.

The binary values of the output are a function of the binary combination of the inputs.

It transforms binary information from the given input data to the required output data.

Examples of combinational circuits are Half-Adder and Full-Adder which are arithmetic circuits
Full Adder
It is a combinational circuit that forms the arithmetic sum of three input bits.
It consists of three inputs and two outputs.

When all the input bits are 0, the output is 0.

S is equal to 1 when only one input is equal to 1 or when all three inputs are equal to 1.

C output has a carry of 1 if two or three inputs are equal to 1.
Half Adder
A combination circuit that performs the arithmetic addition of two bits is called a half-adder.

The input variables of a half adder are are called the augend and addend bits. The output variables the sum and carry.

It consists of an exor gate and an and gate.
Sequential circuit
They are storage elements which require that the system be described in terms of sequential circuits.
The most common type of sequential circuit is the synchronous type.
Synchronous sequential circuits employ signals that affect the storage elements only at discrete instant of time.
Synchronization is achieved by a timing device called a clock pulse generator that produces a periodic train of clock pulses.
Storage elements employed in clock sequential circuits are Flip-Flops.

Flip-Flop
It is binary cell capable of storing one bit of information.
It has two outputs, one for the normal value and one for the complementary value of the bits stored in it.
A flip-flop maintains a binary state until directed by a clock pulse to switch states.
The difference among various types of flip-flops is in the number of inputs they possess and in the manner in which the inputs affects the binary state.
The most common types of flip-flops are SR, D, JK, T, Edge-triggered
Simple Switch Circuit
Switch open:
• No current through circuit
• Light is off
• Vout is +2.9V

Switch closed:
• Short circuit across switch
• Current flows
• Light is on
• Vout is 0V
n-type MOS Transistor
MOS = Metal Oxide Semiconductor
• two types: n-type and p-type
n-type
• when Gate has positive voltage,short circuit between #1 and #2(switch closed)
• when Gate has zero voltage,open circuit between #1 and #2(switch open)
p-type MOS Transistor
p-type is complementary to n-type
• when Gate has positive voltage,open circuit between #1 and #2(switch open)
• when Gate has zero voltage,short circuit between #1 and #2(switch closed)
Logic Gates
Use switch behavior of MOS transistorsto implement logical functions: AND, OR, NOT.

Digital symbols:
• recall that we assign a range of analog voltages to eachdigital (logic) symbol





• assignment of voltage ranges depends on electrical properties of transistors being used
Ø typical values for "1": +5V, +3.3V, +2.9V
Ø from now on we'll use +2.9V
CMOS Circuit
Complementary MOS
Uses both n-type and p-type MOS transistors
• p-type
Ø Attached to + voltage
Ø Pulls output voltage UP when input is zero
• n-type
Ø Attached to GND
Ø Pulls output voltage DOWN when input is one

For all inputs, make sure that output is either connected to GND or to +,but not both!
Inverter (NOT Gate)
NOR Gate
OR Gate
NAND Gate (AND-NOT)
AND Gate
Basic Logic Gates
DeMorgan's Law
Converting AND to OR (with some help from NOT)
Consider the following gate:
More than 2 Inputs?
AND/OR can take any number of inputs.
• AND = 1 if all inputs are 1.
• OR = 1 if any input is 1.
• Similar for NAND/NOR.

Can implement with multiple two-input gates,or with single CMOS circuit.
Summary
MOS transistors are used as switches to implementlogic functions.
• n-type: connect to GND, turn on (with 1) to pull down to 0
• p-type: connect to +2.9V, turn on (with 0) to pull up to 1

Basic gates: NOT, NOR, NAND
• Logic functions are usually expressed with AND, OR, and NOT

DeMorgan's Law
• Convert AND to OR (and vice versa) by inverting inputs and output
Building Functions from Logic Gates
Combinational Logic Circuit
• output depends only on the current inputs
• stateless
Sequential Logic Circuit
• output depends on the sequence of inputs (past and present)
• stores information (state) from past inputs

We'll first look at some useful combinational circuits,then show how to use sequential circuits to store information.
Decoder
n inputs, 2n outputs
• exactly one output is 1 for each possible input pattern
Multiplexer (MUX)
n-bit selector and 2n inputs, one output
• output equals one of the inputs, depending on selector
Full Adder
Add two bits and carry-in,produce one-bit sum and carry-out.
Four-bit Adder
Logical Completeness
Can implement ANY truth table with AND, OR, NOT.
Combinational vs. Sequential
Combinational Circuit
• always gives the same output for a given set of inputs
Ø ex: adder always generates sum and carry,regardless of previous inputs
Sequential Circuit
• stores information
• output depends on stored information (state) plus input
Ø so a given input might produce different outputs,depending on the stored information
• example: ticket counter
Ø advances when you push the button
Ø output depends on previous state
• useful for building “memory” elements and “state machines”
R-S Latch: Simple Storage Element
R is used to “reset” or “clear” the element – set it to zero.
S is used to “set” the element – set it to one.







If both R and S are one, out could be either zero or one.
• “quiescent” state -- holds its previous value
• note: if a is 1, b is 0, and vice versa
Clearing the R-S latch
Suppose we start with output = 1, then change R to zero.
Setting the R-S Latch
Suppose we start with output = 0, then change S to zero.
R-S Latch Summary
R = S = 1
• hold current value in latch
S = 0, R=1
• set value to 1
R = 0, S = 1
• set value to 0

R = S = 0
• both outputs equal one
• final state determined by electrical properties of gates
• Don’t do it!
Gated D-Latch
Two inputs: D (data) and WE (write enable)
• when WE = 1, latch is set to value of D
Ø S = NOT(D), R = D
• when WE = 0, latch holds previous value
Ø S = R = 1
Register
A register stores a multi-bit value.
• We use a collection of D-latches, all controlled by a common WE.
• When WE=1, n-bit value D is written to register.
Representing Multi-bit Values
Number bits from right (0) to left (n-1)
• just a convention -- could be left to right, but must be consistent
Use brackets to denote range:D[l:r] denotes bit l to bit r, from left to right






May also see A<14:9>, especially in hardware block diagrams.
Memory
Now that we know how to store bits,we can build a memory – a logical k × m array of stored bits.
22 x 3 Memory
More Memory Details
This is a not the way actual memory is implemented.
• fewer transistors, much more dense, relies on electrical properties
But the logical structure is very similar.
• address decoder
• word select line
• word write enable
Two basic kinds of RAM (Random Access Memory)
Static RAM (SRAM)
• fast, maintains data as long as power applied
Dynamic RAM (DRAM)
• slower but denser, bit storage decays – must be periodically refreshed
State Machine
Another type of sequential circuit
• Combines combinational logic with storage
• “Remembers” state, and changes output (and state) based on inputs and current state

Combinational vs. Sequential
Two types of “combination” locks
State
The state of a system is a snapshot ofall the relevant elements of the systemat the moment the snapshot is taken.
Examples:
• The state of a basketball game can be represented bythe scoreboard.
Ø Number of points, time remaining, possession, etc.
• The state of a tic-tac-toe game can be represented bythe placement of X’s and O’s on the board.
State of Sequential Lock
Our lock example has four different states,labelled A-D:A: The lock is not open, and no relevant operations have been performed.
B: The lock is not open, and the user has completed the R-13 operation.
C: The lock is not open, and the user has completed R-13, followed by L-22.
D: The lock is open.
State Diagram
Shows states and actions that cause a transition between states.
Finite State Machine
A description of a system with the following components:
• A finite number of states
• A finite number of external inputs
• A finite number of external outputs
• An explicit specification of all state transitions
• An explicit specification of what determines eachexternal output value

Often described by a state diagram.
• Inputs trigger state transitions.
• Outputs are associated with each state (or with each transition).
The Clock
Frequently, a clock circuit triggers transition fromone state to the next.





At the beginning of each clock cycle,state machine makes a transition,based on the current state and the external inputs.
• Not always required. In lock example, the input itself triggers a transition.
Implementing a Finite State Machine
Combinational logic
• Determine outputs and next state.
Storage elements
• Maintain state representation.
Storage: Master-Slave Flipflop
A pair of gated D-latches, to isolate next state from current state.
Storage
Each master-slave flipflop stores one state bit.

The number of storage elements (flipflops) neededis determined by the number of states(and the representation of each state).

Examples:
• Sequential lock
Ø Four states – two bits
• Basketball scoreboard
Ø 7 bits for each score, 5 bits for minutes, 6 bits for seconds,1 bit for possession arrow, 1 bit for half, …
Complete Example
A blinking traffic sign
• No lights on
• 1 & 2 on
• 1, 2, 3, & 4 on
• 1, 2, 3, 4, & 5 on
• (repeat as long as switchis turned on)
Traffic Sign State Diagram
Traffic Sign Truth Tables
Traffic Sign Logic
From Logic to Data Path
The data path of a computer is all the logic used toprocess information.
• See the data path of the LC-3 on next slide.

Combinational Logic
• Decoders -- convert instructions into control signals
• Multiplexers -- select inputs and outputs
• ALU (Arithmetic and Logic Unit) -- operations on data
Sequential Logic
• State machine -- coordinate control signals and data movement
• Registers and latches -- storage elements
LC-3 Data Path

Friday, January 26, 2007

What Is Project

What is Project
by Rajesh Kulkarni
http://rkstechnofusion.blogspot.com
http://children-off-lesser-gods.blogspot.com

Venue BIET
Audience : IV/IV CSE and IT students
ocassion: Two-Day Workshop "Technofusion 2007"
Date: 19-01-2007

FINAL YEAR PROJECTS



§ Working in a team
§ Going thru all the phases of project life cycle from requirement to deployment
§ Developing a piece of software which serves at least as a prototype
§ The developed software should be well documented and maintainable
Final year Project Setup
§ Schedules and deadlines are to be given by Teachers
§ Team selection and problem statement is to be given by students
§ Roles Customer: Internal Guide Initially fuzzy requirement specificationInteraction and negotiation with your customer/guide will lead to SRS which may be approved by your Team Lead/ Project coordinator and Project Manager/HODSRS Document review to be done by project manager/HOD/Committee
§ Coach: Technical problem solving, discussion on new topics, technologies(ensure audience,LCD/OHP,S/W)
§ Design the architecture: Use Case Document




§No money but good marks
§No software architect, all the job will be done by students hence it is not expected that they will be designing a perfect software architecture
§As the life cycle is small(three months) maintenance issues can not be touched
§The product is meant only as a prototype and not for productive use


New technologies can be explored, like
§ CVS (concurrent versions system) or documentum for version control
§ LaTeX/ msword for documentation
§ TogetherJ / Rational Rose as UML editor for modeling and code generation
§ Java libraries like JUnit for regression testing and a setup for daily build and smoke tests
§ XML libraries like JAXP and Log4J for logging mechanism
§ Framework/platform like eclipse

Lessons to be learned from final year project
§ Communication
§ Technical Issues
§ Non-technical issues like problem domain understanding, work division, deadlines, design focus, learning new technologies
§ Process Knowledge
§ Manage problems
§ Documentation
§ Team organisation

Happy Projects !!!!

Sunday, January 21, 2007

WASE BITS-WIPRO SESSION 2 DT:21-01-07

venue wipro
audience : wase 2006 batch
Chapter 4The Von Neumann Model
The Stored Program Computer
1943: ENIAC
Presper Eckert and John Mauchly -- first general electronic computer.(or was it John V. Atanasoff in 1939?)
Hard-wired program -- settings of dials and switches.
1944: Beginnings of EDVAC
among other improvements, includes program stored in memory
1945: John von Neumann
wrote a report on the stored program concept, known as the First Draft of a Report on EDVAC
The basic structure proposed in the draft became knownas the "von Neumann machine" (or model).
a memory, containing instructions and data
a processing unit, for performing arithmetic and logical operations
a control unit, for interpreting instructions
Von Neumann Model
Memory
2k x m array of stored bits
Address
unique (k-bit) identifier of location
Contents
m-bit value stored in location
Basic Operations:
LOAD
read a value from a memory location
STORE
write a value to a memory location
Interface to Memory
How does processing unit get data to/from memory?
MAR: Memory Address Register
MDR: Memory Data Register
To LOAD a location (A):
Write the address (A) into the MAR.
Send a "read" signal to the memory.
Read the data from MDR.
To STORE a value (X) to a location (A):
Write the data (X) to the MDR.
Write the address (A) into the MAR.
Send a "write" signal to the memory.
Processing Unit
Functional Units
ALU = Arithmetic and Logic Unit
could have many functional units.some of them special-purpose(multiply, square root, …)
LC-3 performs ADD, AND, NOT
Registers
Small, temporary storage
Operands and results of functional units
LC-3 has eight registers (R0, …, R7), each 16 bits wide
Word Size
number of bits normally processed by ALU in one instruction
also width of registers
LC-3 is 16 bits
Input and Output
Devices for getting data into and out of computer memory
Each device has its own interface,usually a set of registers like thememory’s MAR and MDR
LC-3 supports keyboard (input) and monitor (output)
keyboard: data register (KBDR) and status register (KBSR)
monitor: data register (DDR) and status register (DSR)
Some devices provide both input and output
disk, network
Program that controls access to a device is usually called a driver.
Control Unit
Orchestrates execution of the program



Instruction Register (IR) contains the current instruction.
Program Counter (PC) contains the addressof the next instruction to be executed.
Control unit:
reads an instruction from memory
the instruction’s address is in the PC
interprets the instruction, generating signals that tell the other components what to do
an instruction may take many machine cycles to complete
Instruction Processing
Instruction
The instruction is the fundamental unit of work.
Specifies two things:
opcode: operation to be performed
operands: data/locations to be used for operation
An instruction is encoded as a sequence of bits. (Just like data!)
Often, but not always, instructions have a fixed length,such as 16 or 32 bits.
Control unit interprets instruction:generates sequence of control signals to carry out operation.
Operation is either executed completely, or not at all.
A computer’s instructions and their formats is known as itsInstruction Set Architecture (ISA).
Example: LC-3 ADD Instruction
LC-3 has 16-bit instructions.
Each instruction has a four-bit opcode, bits [15:12].
LC-3 has eight registers (R0-R7) for temporary storage.
Sources and destination of ADD are registers.
Example: LC-3 LDR Instruction
Load instruction -- reads data from memory
Base + offset mode:
add offset to base register -- result is memory address
load from memory address into destination register
Instruction Processing: FETCH
Load next instruction (at address stored in PC) from memoryinto Instruction Register (IR).
Copy contents of PC into MAR.
Send "read" signal to memory.
Copy contents of MDR into IR.
Then increment PC, so that it points to the next instruction in sequence.
PC becomes PC+1.
Instruction Processing: DECODE
First identify the opcode.
In LC-3, this is always the first four bits of instruction.
A 4-to-16 decoder asserts a control line correspondingto the desired opcode.
Depending on opcode, identify other operands from the remaining bits.
Example:
for LDR, last six bits is offset
for ADD, last three bits is source operand #2
Instruction Processing: EVALUATE ADDRESS
For instructions that require memory access,compute address used for access.
Examples:
add offset to base register (as in LDR)
add offset to PC
add offset to zero
Instruction Processing: FETCH OPERANDS
Obtain source operands needed to perform operation.
Examples:
load data from memory (LDR)
read data from register file (ADD)
Instruction Processing: EXECUTE
Perform the operation, using the source operands.
Examples:
send operands to ALU and assert ADD signal
do nothing (e.g., for loads and stores)
Instruction Processing: STORE RESULT
Write results to destination.(register or memory)
Examples:
result of ADD is placed in destination register
result of memory load is placed in destination register
for store instruction, data is stored to memory
write address to MAR, data to MDR
assert WRITE signal to memory
Changing the Sequence of Instructions
In the FETCH phase,we increment the Program Counter by 1.
What if we don’t want to always execute the instructionthat follows this one?
examples: loop, if-then, function call
Need special instructions that change the contents of the PC.
These are called control instructions.
jumps are unconditional -- they always change the PC
branches are conditional -- they change the PC only ifsome condition is true (e.g., the result of an ADD is zero)
Example: LC-3 JMP Instruction
Set the PC to the value contained in a register. This becomes the address of the next instruction to fetch.
Instruction Processing Summary
Instructions look just like data -- it’s all interpretation.
Three basic kinds of instructions:
computational instructions (ADD, AND, …)
data movement instructions (LD, ST, …)
control instructions (JMP, BRnz, …)
Six basic phases of instruction processing:
F ® D ® EA ® OP ® EX ® S
not all phases are needed by every instruction
phases may take variable number of machine cycles
Control Unit State Diagram
The control unit is a state machine. Here is part of asimplified state diagram for the LC-3:
Stopping the Clock
Control unit will repeat instruction processing sequenceas long as clock is running.
If not processing instructions from your application,then it is processing instructions from the Operating System (OS).
The OS is a special program that manages processorand other resources.
To stop the computer:
AND the clock generator signal with ZERO
When control unit stops seeing the CLOCK signal, it stops processing.

Monday, January 15, 2007

Basics of Java, OOPS and Networking Protocols

Java, OOPS and Networking Protocols
Topic : Basics of Java, OOPS and Networking Protocols
Venue and audience : At a Professor’s house , his daughter who
finished engineering
Date: 24-09-2006
Resources used: IBM GREATMINDS CD and notes of my friend

Java Basics:à
With the Java(TM) programming language, every computer program must define one or more user-defined data types via the class construct. For example, to create a program that behaves like a dog, we can define a class that (minimally) represents a dog: class Dog { void bark() { System.out.println("Woof."); }}
This user-defined data type begins with the keyword class, followed by the name for the data type, in this case, Dog, followed by the specification of what it is to be a dog between opening and closing curly brackets. This simple example provides no data fields, only the single behavior of barking, as represented by the method bark().
A method is the object-oriented equivalent of a procedure in nonobject-oriented languages. That is, a method is a program construct that provides the mechanism (method) for performing some act, in this case, barking. Given an instance of some entity, we invoke behavior with a dot syntax that associates an instance with a method in the class definition

Creating a class instance
public class ADogsLife { public static void main(String[] args) { Dog dog = new Dog(); dog.bark(); System.exit(0); }}
Method overloading
class Dog { void bark() { System.out.println("Woof."); } void bark(String barkSound) { System.out.println(barkSound); }}


Method overloading

Methods have same name but perform different operations
public class DogChorus { public static void main(String[] args) { Dog fido = new Dog(); Dog spot = new Dog(); fido.bark(); spot.bark("Arf. Arf."); fido.bark("Arf. Arf."); System.exit(0); }}

int sum(int a, int b,int c)

{
c= a+b;
return c;

}

Instance variables(barksound is instance variable) class Dog { String barkSound = new String("Woof."); void bark() { System.out.println(barkSound); } void bark(String barkSound) { System.out.println(barkSound); }}


class

class is a template which specifies the structural information about the real world


class classname

{ type var;
}



returntype method( parameter)

{
…..
}

objects

to access members of a class an object must be defined. When object is created memory will be allocated


constructor

constructor is a method with the class name that will be executed when you create the object
the difference between constructor and method is that constructor can not return value but method can return value



class xyz
{

xyz()

{

sop(“object created”);
}
}




class abc

{

xyz obj;

obj = new xyz;

}

Abstraction

Access Methods
In order for the value of an instance variable to vary over time, we must supply a method to change its value; such a method is typically referred to as an access method. By convention, a method that's provided simply to affect a change to an instance variable's value begins with the word "set": void setBark(String barkSound) { this.barkSound = barkSound; }

public class DogChorus { public static void main(String[] args) { Dog fido = new Dog(); fido.setBark("Ruff."); fido.bark(); System.exit(0); }}

this.barkSound = barkSound;
replaces the current value of the instance variable (this.barkSound with the new value passed as an argument (barkSound) to setBark().

Garbage collection finalize method free() new delete

Whatever is the purpose of malloc(), calloc(), free(), realloc() in C i.e. dynamic
memory allocation or during runtime same is the purpose of new and delete in C++ and garbage collector and new in Java while finalize is a method which is invoked before garbage collection.


Applets

The Java(TM) programming language is powerful and elegant. Ironically, however, many people think of it only in terms of its use for developing applets. In reality, the Java programming language is becoming the language of choice for a broad range of other development areas. Nevertheless, applets play an role important in many intranet environments because they provide an (elegant) way of implementing Web-based user interfaces to enterprise-wide computing services.
An applet is an instance of a user-defined class that specializes (inherits from) Applet (java.applet.Applet). Class inheritance is beyond the scope of this tutorial, but, for now, to specialize a class is to extend its capabilities. Applet is a placeholder class with an empty paint() method. Thus, to develop a minimal applet that displays in a portion of a Web browser window, you implement a paint() method that renders graphical output.
Applets employ the Java Abstract Windowing Toolkit (AWT) for the Graphics class, which provides drawing primitives, as well as for GUI components such as Button and TextField. With these components it's straightforward to design graphical forms-entry utilities that corporate-wide users access from a Web browser.
Although applet programmers often develop task-specific implementations of several methods such as init(), start(), stop() that control the applet lifecycle in the browser window, a minimal example with init() and paint() is sufficient here. DogApplet.java implements a simple applet that renders a graphical barking message: import java.awt.*;import java.applet.Applet;public class DogApplet extends Applet { public void init() { setBackground(Color.pink); } public void paint(Graphics g) { g.drawString("Woof!", 10, 20); }}
init() set the background to an uncommon color to ensure that its allocated browser window area is visible. Java-enabled Web browsers execute init() only once, and prior to other methods. paint() uses the Graphics instance, passed as an argument by the browser environment, to draw a string at coordinates (10, 20) relative to the applet's window area.
To specify an applet in a Web page, you must provide an HTML applet tag that specifies the class file (code="class-file") and its relative location (codebase="location"), as well as a width and height request for the applet's window area relative to other components in the Web page. For example, this document includes the following applet tag:
In processing this tag the Web browser:
Loads the DogApplet class file
Allocates its area in the window
Instantiates DogApplet
Executes prescribed methods such as init()
DogApplet appears as follows:
.


public static void main()


main() -à starting point of the program

static-àobject need not be created

public --à can access anywhere


encapsulation

it means wrapping of data into a single unit to hide or to safeguard from the outside world.

It means combining elements to create a new entity

A procedure, a class, a record are an example of encapsulation

encapsulation means that the attributes (data) and the behaviors (code) are encapsulated in to a single object.

class CheckingAccount {

private double balance = 0;
public void setBalance(double bal) {
balance = bal;
};

public double getBalance(){

return balance;
};
}



class Encapsulation {

public static void main(String args[]) {
System.out.println("Starting myEncapsulation...");
CheckingAccount myAccount = new CheckingAccount();
myAccount.setBalance(40.00);
System.out.println("Balance = " + myAccount.getBalance());
}
}



data hiding one of the features of encapsulation

class Encapsulation {

public static void main(String args[]) {
System.out.println("Starting myEncapsulation...");
CheckingAccount myAccount = new CheckingAccount();
myAccount.balance = 40.00;
System.out.println("Balance = " + myAccount.getBalance());
}
}


public private protected are the access specifiers

Inheritance where in specific classes derive attributes from general classes

From Base class/super class attributes are derived by sub class, extends keyword is used to achieve inheritance in Java

Inheritance is used for reusability of code.





Class A

{

…….
}

class B extends A

{
……..

}


class A
{
int x;
int y;

int Add(int I, int j)
{
x=I;
y=j;
return(x+y)

}}


class B extends A

{

int z;

add(int I, int j, int k)

{
x=I;
y=j;
z=k;
s.o.p)x+y+z);
}
}


pvsm()
{

A objA = new A();

B objB = new B();
s.o.p(obj.Add(2,3));
}









method
a function that is part of a class
constructor
a special method that is called when an object is created
superclass
the class that is inherited from (the parent class)
subclass
the class the does the inheriting (the child class)
extends
in Java the keyword extends means that a class will inherit from another class
overload
a method is overloaded if there are two or more methods with the same name in a class. Each overloaded method has a different set of parameters. That's how you can tell which one will get called.
override
a method is overridden if there is a method in the subclass that has the same name and the same set of parameters. The superclass method is then NOT inherited


Multiple inheritance is achieved thru interfaces.

This continued and ended with a brief overview of protocols like TCP/IP, ARP/RARP, DHCP, ICMP/IGMP, RIP/OSPF/BGP, DNS, WEB APPLICATIONS, MVC ARCHITECTURE, LAMP/MAMP/WIMP, LUCID, RAD, SOA etc.

CPM FAQs

CPM FAQs
Topic : CPM FAQs
Venue: Newtons College of Engg. macharla
Audience: Final year engg. Students facing campus
placement interviews
Objectives: Make them aware of all the interview rounds,
concepts of C, C++, DBMS, Networking
Date: 24-08-2006
Resources used: Downloads from chetanas, vyoms, schaum's
series for C and Data structures
1. A TEST ON C was conducted. The pattern was 30 questions 30 min
2. SOME PLACEMENT SCENARIOS WERE EXPLAINED LIKE
A. CPM B. IN CAMPUS C. COMPANIES
3. C BASICS were covered.
4. C++ BASICS by MY collegue Mr. radhesham
5. CN BASICS by me
6. WEBSITES like chetanas, vyoms etc were mentioned
2. SOME SCENARIOS of placements!!!
2A. CPM 2B. IN CAMPUS 2C. COMPANIES
2A. CPM 2A.1. Written Examination 2A.2. Technical Round
2A.3. H R Round 2A.4. GD 2A.1. Written Examination 2A.1.1. Analytical/Aptitude Test 2A.1. 2.Verbal Test 2A.1. 3.Technical Test
2A.1.1. Analytical/Aptitude Test Blood Relation Problems
Percentage Problem
Train Problems
Distance Problems
Maths and Probability Problems
9) Worker W produces n units in 5 hours. Workers V and W, worker independently but at the same time, produce n units in 2 hours. how long would it take V alone to produce n units? a) 1 hr 26 min b) 1 hr 53 min c) 2 hr 30 min d) 3 hr 30 min e) 3 hr 20 min ans: d (e)
Profit and loss
Pick the odd man out
Data interpretation
Data sufficiency
A if only (1) is sufficent. B if only (2) is sufficient. C if either is sufficient. D if both are sufficient. E data insufficient. 11. What fraction of his salary did Mr. Johnson put into savings last week ? 1) Last week Mr.Johnson put Rs 17 into savings. 2) Last week Mr.Johnson put 5% of his salary into savings. (A) (B) (C) (D) (E) ans. B.) only 2nd.
2A.1. 2.Verbal Test Basic vocabulary Missing Spellings,Synonyms,Antonyms,
Meanings of words like Plethora, Elude
Resources !!!
AGARWALS VERBAL AND NON-VERBAL
REASONING
www.mathsworld.com
2A.1. 3.Technical Test i. for(i=0;;i++) /* for is entry controlled loop*/ { printf(“hello”);}/* for(empty;empty;empty) true*/ a. hello… b. infinite loop c. hello d. error c constructs :- sequence, selection, Iteration(for known iterations,while,do while), Jump loops, stmt:-expr, compound, control stmts(sentinel control vs counter control)
Which of the following is true of the following program main() { char *c; int *ip; c =(char *)malloc(100);/*dynamic memory allocation malloc(),calloc()*/ ip=(int *)c; /*instead of a[200] malloc(0 reserves a block of free(ip); /* memory*/ } ans: The code functions properly releasing all the memory allocated

main() {enum Months {JAN =1,FEB,MAR,APR}; Months X = JAN; if(X==1) {printf("Jan is the first month");}} a) Does not print anything b) Prints : Jan is the first month c) Generates compilation error d) Results in runtime error Answer: b) Prints : Jan..
enum is a data type
Storage class enum tag var1, var2, …,var n;
Storage class enum tag {member1, member2, …, membern;
Variables can be characterized by their data types and storage classes.storage classes refer to permanence of a variableand its scope within the program
Auto, extern, static, register
Auto is declare within a function and its scope is within the function
Extern suitable to transfer data betn two functions,global variables,f1 int I, j, f2 extern int I, j
Static permanent var within a function
Main(){incre();incre();incre();}incre(){char var=65; print var++ is 65 65 65
Main(){incre();incre();incre();}incre(){char var=65; print var++ is 65 66 66
Register faster operations, like auto but dynamic
main() {int l=6; switch(l) { default : l+=2; case 4: l=4; case 5: l++; break;} printf("%d",l); } a)8 b)6 c)5 d)4 e)none Answer : c)5
ii. IEEE standards cn session by rajesh kulkarni
iii. Ethernet Standards
iv. 8086 microprocessor
v. Pointers

2A.2. Technical Round
Virtual functions session by radhesham
Loop
Tree traversal techniques
It is a nonlinear data structure
Tree is finite set of one or more data items(nodes) such that there is a special data
item called root of the tree and its remaining data items are partitioned into number
of mutually exclusive subsets each of which is called as a subtree
Terminology :- root, node, degree of a node is the number of subtrees of a node in a
given tree,degree of a tree is the maximum degree of nodes in a given tree, nodes with
zero degree are called as ,levels,edge is connecting line,depth is the maximum level
of a tree ,Binary tree is either empty or consist of root and two disjoint binary trees
called left subtree and right subtree,maximum degree of any node in a binary tree is at
most two preorder traversal :- root, left, right
Inorder traversal :- left, root, right
postorder traversal :- left, right, root
Search techniques
Searching refers to the operation of finding the location of an item from a list.
The method which traverses the item sequentially is called linear search.
LINEAR(DATA,N,ITEM,LOC):- COMPARE DATA WITH ITEM, IF
ITEM=DATA[N+1]
BINARY SEARCH:- synonymous to telephone directory
DATA[BEG], DATA[BEG+1], … DATA[END],
MID=(INT(BEG+END)/2)
IF DATA[MID]= ITEM SEARCH IS SUCCESSFUL
IF ITEM < DATA[MID] THEN END:=MID-1 AND REPEAT
IF ITEM > DATA[MID] THEN BEG:=MID+1 AND REPEAT
HASHING :- NO COMPARISONS,LOCATION OF A DESIRED RECORD IS
COMPUTED IN ORDER TO RETRIEVE IT IN A SINGLE ACCESS FOR
EXAMPLE SUDENT RECORDS ROLL NO IS KEY WHICH CAN ACT AS AN
INDEX, HASH TABLEàBUCKETSàRECORDS HASH FUNCTION
Complexity of Algorithms
Analysis, comparison, measuring the efficiency of algorithms. M is an algorithm and
N is the size of the input data. The time and space used by the algorithm M are the
two main measures for the efficiency of M.The time is measured by counting the
number of key operations-in searching and sorting algorithms, for example, the
number of comparisons. The space is measured by counting the maximum of memory
needed by the algorithm. The complexity of an algorithm M is the function f(n) which
gives the running time and/or storage space requirement of the algorithm in terms of
the size n of the input data.
Worst case, average case, best case
Rate of growth of complexity. Logn, n, nlog n, n2,n3…,2n
Difference between structures and unions
Functions call by value and call by reference
Oops concepts
WAP to find whether a number is prime or not Sorting techniques
Quick sort, Insertion sort, Selection sort, Bubble sort,Stacks,Queues,Circular Queue, DBMS queries, Primary key, super key, candidate key, normalization
What is an Entity? It is a 'thing' in the real world with an independent existence.
What is an Entity type?
It is a collection (set) of entities that have same attributes.
What is an Entity set?
It is a collection of all entities of particular entity type in the database
What is the use o UML
2A.3. H R Round
Talk about CHICKEN GUNIYA
Why you want to join this job? why u want to do job than studiesHow many days will you work with our organisation
Why you should be considered for this job
What will be your contribution to the organisation
If the company says your team has done excellent work what will be your reaction
Why your percentage is decreasing?
Your hobbies and extracurricular activities
What are your weaknesses, strengths?
Tell about your family background
Tell the story of a movie in exactly twenty minutes, again same story in 3 minutes
2A.4. Group discussion
feedback…

Current Trends In Software Industry… Rethinking The Future… Insight in to CSE and IT Dept…

study circle biet 16-12-06
Current Trends In Software Industry… Rethinking The Future… Insight in to CSE and IT Dept…
Rajesh Kulkarni
http://children-off-lesser-gods.blogspot.com
http://360.yahoo.com/rkpv2005
Venue:Study circle biet audience: all staff 16-12-06
SOA SERVICE ORIENTED ARCHITECTURE
Web services such as SOAP and REST permit interoperability among different platforms such as .net and java
SOX COMPLIANCE
SERBANESE OXLEY REGULATORY EDICT AND PRIVACY LAWS
SIX SIGMA
METHOD FOR ELIMINATING DEFECTS 3.4 DEFECTS PER MILLION OPPORTUNITIES
BS7799
Information Security Management Systems - Guidelines for Information Security Risk Management
LAMP LINUX APACHE MYSQL perl/PHP/PYTHON
Apache is open source web server used for web applications, dynamic content generation
Mysql is the database component
Accessed thru APIs written in ruby,perl,lisp,c# or thru ODBC connectivity
PHP HYPERTEXT PROCESSOR
Server side scripting language for dynamic web page generation
PYTHON dynamically typed interpreted programing language used by google
Perl is a dynamic interpreted programming language
LAMP WAMP MAMP
.net framework àc# àaspàiis serverànative server
javaàservletsàjspàscripletsàweb serveràweblogic
Technocentric vs LUCIDàusabilityàReusability
Technologyà web applnsàhtml,cgi,servlets,jsp,asp,xml,ejb Interfaceà cli, gui, hci, cgi
MY FATHER … ME…MY DAUGHTER
TECHNOCENTRIC…..LUCID
Rapid Prototype Development iterative refinement model and incremental model
TechnocentricàLUCIDàevaluationàTestingàUser Acceptance TestàUsabilityàEthnography.
Eclipse Eclipse SDK=Java JDT + PDE
It is a platform which provides services necessary for integrating software development tools which are implemented as pluggins
TIVOLI client server appln, storage manager, intelligent backups
DB2 database
DB2 Express-C :- replication, warehouse management
WASCE:- websphere appln sever community edition
PRESENT
INTERNET JUNKEYS
ORKUT
YOUTUBE-$1.775 BILLIONS
BLOG
VIRTUAL COMMUNITIES
FUTURE
CYBORG
WASHING MACHINE
ROBOT OF CSE HOD
MOBILE
VIRTUAL REALITY
RETHINKING THE FUTURE
OUR COLEGE HAS A MISSION AND VISION OF BECOMING A HEALTHY COLLEGE, NBA ACCREDITATION
IT IS BLESSED WITH VISIONARIES LIKE SECRETARY, PRINCIPAL, DEAN, HOD EEE, HOD ECE
INSIGHT INTO CSE AND IT DEPT
• OBJECTIVE
EFFORTS TOWARDS healthy academics
• CDD
• CRs meet last meeting on 09-nov-2006
• Weekly meets last meeting on 14-dec-2006
• Counsellor files- monthly audit on 8th and 22nd
• KRAs=2R+1NR
magazines
• Prayaas
Akruthi
Lab management
• Lab service head – Nagaraju
– LIC LAB1-Ms. Vasantha
– LIC LAB2-Ms. Babitha
– LIC LAB3-Ms. Krishnaveni
– LIC development lab-Mr. Sriharikumar
– LIC ITworkshop-Mr. Raghavendra
ONLINE EXAMS
• ONLINE COORDINATOR- S.ANAND
– ONLINE TECHNICAL
• K.SRINIVAS
– RADHESHAM
– RAJESH
– PAVAN
– DEPARTMENTAL COORDINATORS
• MS. LENINA, MS.REVATHI, MR. RANA, MR.MECH
STUDENT MANAGEMENT
• CR
• SR
• DISCO
• ALLCOM
• PCOM
• WEBR
• SDR
FREQUENT GETTOGETHERS
• FAREWELLTO MR. KRANTHIKIRAN KranthiKiranBIETCSITHODFarewelll.htm
• FIESTA LUNCH
FIESTADSC00876.JPG
FIESTADSC00885.JPG
FIESTADSC00878.JPG
FIESTADSC00899.JPG
REQUIREMENT
• BATTERY OPERATED TROLLEY

BITS-WIPRO:MS IN SOFTWARE ENGINEERING

BITS-WIPRO:MS IN SOFTWARE ENGINEERING
14-01-2007
Course number and course title
SEWP ZC221 Structured Programming
Instructer : Rajesh Kulkarni
hodcse@biet.ac.in
rkpv2002@gmail.com
http://children-off-lesser-gods.blogspot.com
http://360.yahoo.com/rkpv2005
week 1: Elementary computer organization; introduction to number
systems, Representation of Integers, Real numbers, Overflow,
Bit, Data types and operations
1.1.1 Computer OrganizationThe way hardware components are connected together in a computer system.Computer architecture is the structure and behavior of various functional modules and how they interact to provide the processing needs of the user.Computer design is the development of hardware according to given set of specifications. Computer organization is I. CPU Organization II. Memory Organization III. I/O OrganizationI. CPU Organization: ALU,CU, Registers which are memory elements for temporary storage Registers are memory element for temporary storage. Size of register indicates how much information the processor can operate at one time, 16, 32, 64 bit.Buses : data buses indicate information moving capability 16,32,64, address buses indicate ram size or memory handling capability; 8086 220= 1M.II.Memory Organization: MAR,MBR,CacheIII. I/O Organization: Programmed I/O, Interrupt driven I/O, DMA
1.2 Data Representation
Registers contain both data and control information for data manipulation. Data are numbers and other binary coded information. Common types of data indicate Data Types.
Data Types
1. Numbers2.Letters or alphabets3.symbols
Data are represented in registers in binary coded form. Registers are made of flip-flops have two states which are capable of storing one bit of information. This change with the arrival of a clock pulse.1.2.1Number systems
Radix or base: 2, 10, 8, 16, rBinary coded octal numbers
----TABLE OF BCD,HEXA,OCTAL CAN BE KEPT
Number system
ASCII
Character Code in microcomputers Communication
Seven Bit Scheme
27 = 128 Unique code
Extended ASCII = 2 8 = 256
Information is Stored in the form of Bits for two voltages or magnetic States
A à 01000001 à 65
B à 01000010 à 66
----- HERE ASCII TABLE CAN BE KEPT------ BINARY Machine language Two Digits 0 and 1 Compatible with digital electronic Circuits
BITSON - True - 0
Off – False – 1
Binary Notation ……… 16s 8s 4s 2s 1s
1. ( 1101)2 = ( ? ) 10
1 1 0 1
8 4 2 1 =
+ + + = 13
2. 1 0 1 0
8 4 2 1 = 10
+ + +
27 26 25 24 23 22 21 20
128 64 32 16 8 4 2 1
Binary Addition
1. 8 4 2 1
1 0 1 1 11
1 1 01 +13
------------- -------
24 ß 1 1 0 0 0 24
-----------------------------------
2. 1 1 0 1
1 1 1 0
3. 1 0 1 1
0 0 1 1
4. 1 1 1 0
1 1 1 1
Binary Multiply
1. 1 0 0 1 9
x 1 1 1 0 x 14
______________ _____________
0 0 0 0 ( 126)10
1 0 0 1
1 0 0 1
1 0 0 1
­­­­­­­­­­­­­­­­­_______________
( 1111110) 2 = (126)10
_________________
2. 1 0 1 1 11
1 1 0 0 12
_________
132
_____________
Decimal = 10 hexa = 6
Hexadecimal
6 + 10 = 16
0 1 2 3 4 5 6 7 8 9 A B C D E F
Integer Representation
1 0 1 0 1 0 1 0 = 170
Unsigned Representation
1 0 1 0 1 0 1 0 = -42
Signed
MS B = 1 à Negative
= 0 à Positive
complements
Simplifying the subtraction and logical manipulation
Allows to represent positive and negative numbers.
Deal with subtraction using addition
10s complement
9s complement
1s complement
2s Complement
base or radix ==== r
r’s complement
r-1’s complement
r=10
10’s complement
10-1= 9’s complement
9’s complement
N Base r-1 r – 1’s Complement of N
N r r-1 (rn - 1) - N
10 9 (10n – 1) – N where 10n – 1 = n 9s
n=4 , 10000 – 1 = 9999
546700 999999 – 546700= 453299
10’s complement is 9’s complement + 1
r=2
2’s complement
2-1=1’s complement
1’s complement
16 = 10000
24 - 1 = 1111 subtraction of binary is done thru
2’s complement is 1’s complement + 1
Base Conversion Table
======= ADDITION, MULTIPLICATION TABLE CAN BE KEPT HERE =====
Binary To Decimal
1. ( 1 0 0 1 0) 2 = ( ? )10
2 4 x 1 + 0 + 0 + 2 1 x 1 + 20 x 0 =
16 +2 + 0 = ( 18) 10
2. ( 1 0 1 1 0 ) 2 = ( ?) 10
2 0 x 0 + 21x1 +22 x 1 + 23 x 0 + 24 x 1
= 0 + 2 +4 + 0+ 16 = (22) 10
3. ( 1 1 0 1 0 )2 =
4. ( 1 1 1 1 0 )
5. ( 1 0 0 0 1 1 1 1) 2
6. ( 0 1 0 1 0 0 0 1 ) 2
7. ( 0 1 1 1 0 0 1 1) 2
Binary to Hexadecimal
( 1 1 0 11 0) 2 = ( ? ) 16
Group digits in set of four, begining at the right
11 0110
____ __________ = (36) 16
3 6
___________________
2. ( 1 0 11 11) 2 = 10 1 1 1 1
____ _____________
2 15
= ( 2 F) 16
3. ( 10 111 0) 2 = ( ?) 16
4. (11 0 0 11 0) 2
5. ( 11 00 10) 2
6. (11 01 11) 2
7. ( 00 1100) 2
8. ( 111010) 2
9. ( 111111) 2
10. (1001011)2
Decimal to Binary
Divide the number by 2
( 24 ) 10 = ( ?) 2
2 24 0
2 12 0
2 16 0
2 3 1
2 1 1
0 ( 1 1 0 0 0 ) 2
1 .( 48) 10 =
(113) 10 =
(127) 10 =
Decimal to Hexadecimal
Divide the number by the base Number
1. ( 1 6 9) 10
16 169
16 10 9
0 10
( A 9 ) 16
2. ( 95 ) 10 =
3. ( 46) 10 =
4. ( 3315.3) 10 = ( ? ) 16
Hexadecimal to Binary
Convert each digital to its four digit binary equivalent and record from left to right
1. ( A C ) 16 = A C
1010 1100
Hexa To Decimal
1. ( A9) 16 = ( ? ) 10
A X 16 1 + 16 0 x 9
= 16 x 10 +9
= (169) 10
2. ( A F) 16
3. (4 B3.3) 16
4. CF3.4CC
Octal to Decimal
Sol – B2D
1. ( 234.14) 8 = ( ? ) 10
3( 26) 10
( 30) 10
(143) 10
(81) 10
(114) 10
Sol – B2H
3. ( 2E) 16
4. (66) 16
5. (32) 16
6. (37)16
7. (OD) 16
8. (3A) 16
9. ( 7F) 16
10. (4B) 16
Sol – D2 B
1. ( 1 1 0 0 0 0) 2
2. ( 1 1 1 0 0 0 1 ) 2
3. ( 1 1 1 1 1 1 1) 2
2. ( 5F) 16
3. ( 2E) 16
H 2 D
2. ( 175 ) 10
3. 1203 .1875
Octal 2 D
1. 156 .1875